1. Field of the Invention
The invention relates to a signal amplifier circuit, and more particularly to a signal amplifier circuit with an adaptive bias.
2. Description of the Related Art
In amplifier application, efficiency and linearity are major considerations. For current wireless communication systems, radio frequency (RF) power amplifier (PA) consumes a majority of the power for portable products. Consequently, a conventional method to extend operation and standby time of wireless communication systems is improving the efficiency of the PA.
In the application of some wireless systems, the bias of the conventional PA is operated at a fixed voltage. PA often operates at 6-8 dB backed off from P1dB (1 dB compression point) to satisfy the linearity requirements of the system, such that PA generally operates in a low-efficiency state. For example, for orthogonal frequency division multiplexing (OFDM) modulation techniques used in wireless local area network (WLAN), specific data sequences lead to a high peak to peak ratio (PARR) of the output signal. PA needs to operate in wider linear region to reduce distortion of the transmitted signal, thus PA generally operates in low-efficiency region. For example, the average of power added efficiency (PAE) of complementary metal oxide semiconductor (CMOS) RF PA is generally below 10%.
For both efficiency and linearity, the conventional technique receives the peak level of the signal by a coupler and power detector first, and then transforms the signal into a bias signal through DC/DC converter to enhance PAE. However, the bias circuit comprising the coupler, power detector and DC/DC converter is not easy to integrate into a transmitter due to high costs and large size.